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NEWSSEMICONDUCTORS

Intel talks power savings as Moore’s Law enters last decade

AMD in the firing line as Intel adopts greener design priorities

Day one of the Intel Developer Forum featured co-founder and former CEO Gordon Moore’s latest prophesy - that his eponymous law of silicon device density could expire in as little as 10 years. However, Intel’s present crop of senior executives seemed unconcerned – being too busy revealing plans to clobber rival AMD with a series of new power efficient products.

Moore’s Law - that the number of transistors on a micro-chip doubles every 18 to 24 months – has accurately predicted CPU evolution since 1968. Now though, Moore himself believes chip makers are close to meeting insurmountable physical barriers to further integration scaling. “Another decade, a decade and a half, I think we’ll hit something fairly fundamental” he told IDF delegates on Tuesday.

10 years is a long time in the chip business though, so the great majority of Moore’s audience were probably more immediately interested in a rash of Intel technology announcements. Most of these emphasise Intel’s new obsession with energy saving and power efficiency.

One of the drawbacks of four decades of bi-annual hikes in chip density is that it has been accompanied by similarly large leaps in power consumption – so much so that data centre server racks that drew 5 kiloWatts only three years ago, now more commonly consume 30 kWs. This has driven up the opex costs of all data centre operators, and in some cases obliged utilities to effectively cap supplies to data centre customers whose power consumption has exceeded their local grid capacity.

AMD was the first chip maker to capitalise on the data centre power crisis, as the superior power-efficiency of its early Opteron chips helped it win server market share from Intel. However, Intel has learned its lesson, and has since put power-efficiency at close to the top of its new product development agenda.

Certainly, superior MIPS per Watt performance is expected to be a key feature of the Intel’s next generation Penryn chips which we now know will ship in November, with 20 new parts based on the 45 nanometer process in the market before year-end. Intel claims the smaller die size, and several new technologies specifically designed to improve energy efficiency will see Penryn parts raise performance thresholds by up to 20% whilst actually reducing power consumption.

Penryn threatens to overshadow AMD’s comeback strategy, which is founded on the power/performance profile of its recently released Barcelona quad-core chip. Barcelona has been late coming to market, and may now struggle to make an impression before Intel is ready to ship its first entirely re-architected 45nm chip – Nehalem.

Intel has confirmed that Nehalem is on target to ship in the second quarter next year, when it will bring even more power-efficient virtues to market including, ironically for AMD, Intel support for on-core memory management – a low-latency, power-efficient architecture feature that AMD pioneered in Opteron.

As well as other CPU-focussed power-efficiency – such as more sophisticated power-down services for its laptop chips – Intel also unveiled plans to step-up production of solid state storage devices. With no spinning platters or other moving parts, devices such as the NAND flash memory drives that Intel launched for laptops in March, offer significant opportunities for reducing total system energy consumption, and next yeat the company plans to extend these opportunities to the data centre.

Few details were offered, other than Intel’s announcement that its first generation of solid state drives for servers will come in 32GB units. Chances of them price competitive with conventional drives are slim to vanishing, but Intel predicts they will provide a 10 to 50-fold boost to I/O performance whilst still reducing systems power consumption.

 

By Phil Jones, pjones@information-age.com